Wafer-level packaging is a technology of packaging integrated circuit chips still forming part of a wafer or semiconductor substrate on which the chips are produced. Electrically conductive contact pads are provided for external electric connections. Bump contacts are applied on the contact pads before the chips are separated by wafer dicing.
U.S. Pat. No. 8,652,939 B2 discloses a method for die assembly. A trench is formed extending from an active surface of a semiconductor substrate comprising a plurality of integrated circuit dies having connector terminals extending from the active surface. The trench extends into, but not through, the semiconductor substrate. A protective layer, which may be a polyimide or an underfill material, is formed overlying the active surface and the trench and covering the lower portion of the connector terminals. A pre-dicing opening is formed in the protective layer and within the trench. A backgrinding tape, which is afterwards mechanically removed or can be released by curing with an ultraviolet light source, is applied over the active surface, the protective layer and the connector terminals. The substrate material is removed from the backside until the pre-dicing opening is exposed.